My client is a world leader in semiconductor, equipment, optical components and laser products and now seek a highly experienced IC/Mask Layout Design Engineer
Responsibilities:
- Assume responsibility for Power Management Layout Design including floor plan, detail placement, routing, verifications, layout review meetings, staffing plan, LEF/DEF deliverables, sharepoint site documentation, final data deliverables, and final data release.
- Design mask layout for photonics, optoelectronics, interposer devices and circuits. (including block level, bar level, die level layout)
- Design rules associated with process and fabrication of wafers.
- Review and discuss with the process integrator/engineers to check mask layout.
- Generate mask layout mapping (wafer map) of cells, dies types in relation to device design variants. Generate device variants tables in relation to the wafer-map.
- Review and analyse floor plans with device engineers and complex circuits with circuit designers.
- Capacity to take on board new approaches and working methods.
Requirements:
- Diploma/Bachelor Degree in Electrical and Electronic Engineering / Electronic Engineering majoring in Microelectronics/Optoelectronics
- Strong layout knowledge with 6 - 10 years' of experience
- Familiarity with usage of various mask layout software such as Layout Editor, L-Edit, AutoCAD, Silvaco is a plus.
- Knowledge in Optoelectronics, and associated circuits and layout will be added advantage.
- Knowledge in Microelectronics, Optoelectronics, Photonics devices fabrication methodology will be a plus.
- Knowledge in process integration will be a plus.
Please send your resume in WORD format by clicking the apply button below or contact Abhik Damani on +65 6701 1527 for a confidential discussion. Please note that only short-listed candidates will be contacted. CEI Reg. Number R1544061 (Abhik Damani).
